Three audiences · one mission

AI that uses less electricity - and proves it.

Up to 86% less energy per processed token*

Faithful full-model Qwen2-7B CUDA execution now running on NVIDIA H100, with 1.0 token agreement in the current Hugging Face acceptance test.

LuxiEdge has demonstrated major energy and throughput advantages in controlled H100 research. Separately, its faithful full-model Qwen2-7B CUDA path has passed the current CPU and Hugging Face correctness gates.

Up to 86%
Lower H100 board energy per processed token*
3.56×
Processed-stack throughput*
Full 28-layer
Faithful Qwen2-7B CUDA path on H100
1.0
HF/CUDA greedy-token match rate in the current acceptance test**

*Measured as NVIDIA H100 board joules per processed token in a controlled sustained Qwen2-7B-Instruct research workload at sequence length 128. LuxiEdge TRADE research stack: approximately 0.00453 J/token; Hugging Face Transformers FP16 reference: approximately 0.03296 J/token, an approximately 86.3% reduction. The same test recorded approximately 3.56× processed-stack throughput. Internal benchmark; results vary by workload and system configuration. Faithful full-model Qwen2-7B CUDA integration is complete at the current correctness-acceptance level; faithful-path energy optimization and production-serving validation are ongoing.

**Current acceptance testing includes matched CPU, CUDA, and Hugging Face greedy-token comparisons under the defined limited protocol. It is a correctness result, not a broad model-quality or performance ranking.

Full methods and downloads: Proof.

Internal H100 milestone - independent validation pending

New: faithful Llama 3.1 resident inference

LuxiEdge has completed a GPU-resident Llama 3.1 8B inference milestone with BF16 Tensor Core execution, batched prefill, active-slot continuous batching, device-side token selection, resident KV state, and CUDA graph decode. The active-batch path matched the serial BF16 path exactly on the primary p32 and p128 correctness gates.

~398
Generated tok/s
4 active requests · p128 × d32
~641
Generated tok/s
8 active requests · p128 × d32
~0.25
Board J/generated token
Warm batch four · NVML approximation
Exact
Batch-to-serial agreement
Primary p32 and p128 gates

Internal H100 NVL engineering measurements. Independent reproduction and matched production-engine testing are pending. Not an official MLPerf result. Board energy is not facility wall-plug energy.

A three-legged stool

Pick the path that fits you. Every path can end in shareable proof.

Quant & research

Determinism, audit trails, free-ride paths, long-context memory - for people who need methods, not slogans.

Science path →

AI & data centers

Power caps, density, measured joules-per-token under load, and a commercial path to evaluation.

Operator path →

We need your help

You don’t need a PhD. Share the energy story. Ask AI providers and data centers why they aren’t cutting waste.

Public path →

What we measure - honestly

On the record

  • Up to 86% lower board energy per processed token in controlled H100 testing*
  • Approximately 3.56× processed-stack throughput in the same test*
  • Sustained Qwen2-7B research workload on NVIDIA H100
  • Long-context memory scaling (O(N) vs O(N²))

What we do not claim

  • Not a claim that every AI workload or facility saves 86%
  • Not a claim of chat-quality superiority over every model
  • No claim of broad serving leadership over every production inference engine
  • Matched vLLM and TensorRT-LLM comparisons are pending
  • Faithful Llama measurements are internal and not yet independently reproduced
  • Public TRADE measurements and faithful Llama measurements are separate execution lanes
  • Across our faithful, audit, and energy-research paths, we differentiate through reproducibility, memory scaling, and measured H100 efficiency
  • Facility wall-plug power needs separate metering
We publish comparisons both ways. See the Proof page for packs, tables, and downloads.